RISC, Pipelines & Logic
A-Level Computer Science Topic 15 15:02 English narration · English + 中文 subtitles burned in
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Two chip designers face the same problem: make programs run fast.
两位芯片设计师面对同一个难题：让程序跑得快。
One says — build powerful instructions, so each one does a lot of work.
一位说——那就造出强大的指令，让每一条都干很多活。
The other says — keep every instruction tiny and simple, so each one finishes in a single tick.
另一位说——把每条指令都做得又小又简单，这样每一条都能在一个节拍里完成。
Those two answers are CISC and RISC, and the choice shapes everything: how the chip decodes, how it pipelines, even how hot it runs.
这两个答案就是 CISC 和 RISC，而这个选择塑造了一切：芯片如何译码、如何流水作业， 甚至它有多热。
Inside the processor: how instruction sets, pipelines and logic gates decide a chip's speed.
走进处理器内部：指令集、流水线和逻辑门如何决定一块芯片的速度。
Today: RISC versus CISC, pipelining, Flynn's taxonomy, Boolean simplification, and the adders built from gates.
今天我们讲： RISC 与 CISC、流水线、弗林分类、布尔化简，以及用逻辑门搭出来的加法器。
Let's begin.
让我们开始吧。
Before we go inside the chip, look at where it lives.
在深入芯片内部之前，先看看它住在哪里。
This is a motherboard: the main board that links the processor, the memory and every other part of the computer together.
这是一块主板：把处理器、内存和计算机其他所有部件 连接在一起的主要电路板。
The square socket in the middle holds the CPU.
中间那个方形插槽装的就是 CPU。
The long slots beside it take the memory, and the row of ports along one edge reaches the outside world.
旁边的长插槽插内存， 边缘那排接口通向外部世界。
Every design choice in this lesson is a choice about the chip that clips into that socket.
这节课里的每一个设计选择，都是关于那块卡进插槽的芯片的选择。
CISC — complex instruction set — has many instructions, some very powerful, and they vary in length.
CISC——复杂指令集——拥有许多指令，其中一些非常强大，而且它们长度不一。
One instruction might read memory, compute, and write the answer back.
一条指令可能就读内存、做运算，再把结果写回去。
Decoding that is intricate.
要译码这样的指令是很繁复的。
RISC — reduced instruction set — has few, simple instructions, all of one fixed length, and only load and store touch memory; everything else works register to register.
RISC——精简指令集——只有少量简单的指令，全都是同一个固定长度， 而且只有取数和存数会碰内存；其余一切都在寄存器之间完成。
Programs get longer, but each instruction is quick and predictable.
程序变长了， 但每一条指令都又快又可预测。
Look closely at one CISC instruction.
把一条 CISC 指令拆开看。
A single instruction may make several memory accesses and several operations: read two values from memory, add them, and write the answer back, all under one name.
单独一条指令可能就做好几次内存访问和好几个运算： 从内存读出两个值、把它们相加，再把结果写回去，全都用一个指令名。
That is how CISC does more work per instruction, in hardware.
CISC 就是这样在硬件里让每条指令做更多的事。
But its instructions are of variable length, so the decoder cannot tell where the next one begins until it has finished reading this one.
但它的指令长度不固定， 所以译码器在读完这一条之前，无法知道下一条从哪里开始，译码因此很繁复。
Decoding is intricate. The Intel x86 family is the classic example, and it is still the design inside most laptops and desktops today.
Intel 的 x86 系列就是最经典的例子，今天大多数笔记本和台式机里用的还是这种设计。
RISC goes the other way.
RISC 走的是另一条路。
It has a small set of simple instructions, each doing one basic operation, and they are all of fixed length, so decoding is fast.
它只有一小套简单的指令，每条只做一个基本操作，而且全都是固定长度， 所以译码很快。
Only load and store may touch memory. Everything else is register to register, and because memory is slow while registers are fast, a RISC chip carries many registers, with the compiler choosing which values to keep in them.
只有取数和存数可以碰内存，其他一切都在寄存器之间进行； 因为内存慢、寄存器快，RISC 芯片会配很多寄存器，由编译器决定把哪些值放在里面。
Programs come out longer, but every instruction stays quick.
程序会变长，但每条指令都很快。
ARM and RISC-V are built this way, which is why they run almost every phone and embedded chip you own.
ARM 和 RISC-V 就是这样设计的， 所以你的手机和几乎所有嵌入式芯片都在用它。
So the trade-off is easy to state.
所以这个取舍很好说清楚。
CISC does more per instruction. RISC makes each instruction faster and more predictably.
CISC 让每条指令做得更多；RISC 让每条指令更快、更可预测。
Neither answer is wrong, and industry ended up borrowing from both: a modern Intel processor still accepts CISC instructions, then translates them inside into simpler, RISC-like micro-operations before executing them.
两个答案都不算错，而业界最后从两边各取一半：现代的 Intel 处理器仍然接受 CISC 指令， 但在内部先把它们翻译成更简单的、类似 RISC 的微操作，然后才执行。
The instruction set you write for and the machine that really runs it are no longer the same thing.
你写程序面对的指令集，和真正跑它的那台机器，已经不是同一个东西了。
That predictability pays off in the pipeline — overlapping stages, like a factory line.
这种可预测性在流水线上得到了回报。
The processor splits each instruction into stages — fetch, decode, execute, memory, write back — and works on five instructions at once, each at a different stage.
就像工厂的流水线，处理器把每条指令拆成几个阶段—— 取指、译码、执行、访存、写回——并同时处理五条指令，每条处在不同的阶段。
Once the line is full, one instruction finishes every clock cycle.
一旦流水线装满，每个时钟周期就完成一条指令。
RISC's fixed-length instructions make every stage take the same time, so the line never jams.
RISC 定长的指令让每个阶段耗时相同， 所以这条线不会卡住。
A branch, or a result that isn't ready yet, can still stall it — that's a hazard.
但一次分支跳转，或者一个还没算好的结果，仍然可能让它停顿——这就是冒险。
A pipeline only pays off while it stays full, and two things empty it.
流水线只有装满的时候才划算，而有两件事会把它清空。
A data hazard: the next instruction needs a result the instruction in front has not finished computing, so it has to wait.
数据冒险：下一条指令需要前一条还没算完的 结果，只能等。
A control hazard: a branch, and until the processor knows whether the branch is taken it does not know which instruction to fetch.
控制冒险：遇到分支跳转，在处理器判断出这个分支到底跳不跳之前， 它不知道该取哪一条指令。
Either way the line stalls and cycles are wasted.
两种情况都会让流水线停顿，白白浪费周期。
That is why uniform, predictable instructions matter so much.
这正是为什么统一、可预测的指令这么重要。
There is a price for running this fast.
跑得这么快是有代价的。
A processor working flat out gives off a lot of heat, and silicon that gets too hot stops working reliably.
全速工作的处理器会放出很多热，而硅片太热就无法可靠工作。
So a heat-sink sits on top of it. Those thin metal fins spread the heat over a large area, the copper pipes carry it up from the flat base touching the processor, and the fan blows it away.
所以它上面会压着一个散热器：那些薄薄的金属鳍片把热散布到很大的面积上， 铜管把热从贴着处理器的底座往上带走，风扇再把热吹掉。
Cooling is part of processor design, not an accessory.
散热是处理器设计的一部分， 不是可选的附件。
Flynn's taxonomy sorts machines by how many instruction and data streams they run.
弗林分类按照机器运行多少条指令流和数据流来给它们分类。
SISD: one instruction, one data item — a classic single core.
SISD：一条指令、一个数据—— 就是经典的单核。
SIMD: one instruction applied to many data items at once — that is what a graphics card does to millions of pixels.
SIMD：一条指令同时作用在许多数据上——显卡对上百万个像素做的正是这件事。
MIMD: many processors, each running its own instructions on its own data — a multi-core chip, or a supercomputer with thousands of nodes.
MIMD：许多处理器，各自用自己的指令处理自己的数据——多核芯片，或者拥有上千个节点的超级计算机。
MISD is the rare one, mostly theoretical.
MISD 是罕见的那一类，基本停留在理论上。
Here is SIMD you can hold in your hand.
这就是你能拿在手里的 SIMD。
A graphics card carries thousands of small cores, and they all run the same instruction on different data at the same time: one instruction, millions of pixels.
一块显卡上有成千个小核心，它们同时对不同的数据执行同一条指令： 一条指令，上百万个像素。
That is why a GPU is so fast at images and video, and why the same hardware now trains machine-learning models, which are also the same arithmetic repeated over huge arrays of numbers.
这就是 GPU 处理图像和视频这么快的原因， 也是同样的硬件现在用来训练机器学习模型的原因——那也是在巨大的数字数组上重复同样的算术。
Scale that idea up and you get a massively parallel computer: thousands of processors on a very fast network, each with its own memory.
把这个想法放大，你就得到一台大规模并行计算机：上千个处理器接在一个极快的网络上， 每个处理器都有自己的内存。
Nothing is shared, so this is distributed memory, and processors that need each other's values pass them as messages.
什么都不共享，所以这叫分布式内存； 需要彼此数据的处理器之间靠消息来传递。
In Flynn's terms it is MIMD, because every processor may run different instructions on different data.
按弗林的分类，它属于 MIMD， 因为每个处理器都可以用不同的指令处理不同的数据。
The largest supercomputers in the world are built exactly this way.
世界上最大的超级计算机，正是这样搭出来的。
The processors live in tall server racks like these, often filling a whole room, a data centre, wired together so they can work on one problem at the same time.
这些处理器就装在这样高高的服务器机架里，常常占满一整间房间——也就是数据中心—— 彼此连在一起，好让它们同时处理同一个问题。
Ordinary programs cannot use them: the software has to be written for it, with tools like MPI or CUDA.
普通程序用不了它们：软件必须专门为它编写， 用 MPI 或者 CUDA 这样的工具。
What is worth that effort?
什么问题值得花这份功夫？
Climate simulation, training large machine-learning models, and astrophysics, problems that split into thousands of pieces.
气候模拟、训练大型机器学习模型， 还有天体物理——这些问题都能被切成上千块。
Now a machine made of software.
现在换一种机器：用软件做出来的机器。
A virtual machine is a software emulation of a whole computer: the software inside sees a processor, memory and disks that look real, but they are managed by host software.
虚拟机是对一整台计算机的软件仿真—— 里面的软件看到的处理器、内存和硬盘看起来都是真的，其实都由宿主软件管理。
A system virtual machine runs a complete operating system, and a hypervisor creates and manages several of them, each booting its own guest OS.
系统虚拟机运行一整个操作系统，而虚拟机监控器负责创建和管理好几台虚拟机， 每一台都启动自己的客户操作系统。
That buys you different operating systems on one machine, server consolidation, sandboxing so risky software runs isolated, and snapshots you can roll back to.
这样你就能在一台机器上跑不同的操作系统、做服务器整合、 把有风险的软件隔离在沙箱里运行，还能拍快照随时回滚。
The second kind is a process, or language, virtual machine, and it runs one program.
第二种是进程虚拟机，也叫语言虚拟机，它只运行一个程序。
The program is compiled to portable bytecode, and the VM executes it: the JVM for Java, the CLR for dot NET, CPython for Python.
程序先被编译成可移植的字节码， 再由虚拟机执行：Java 用 JVM，.NET 用 CLR，Python 用 CPython。
You get portability, write once and run anywhere; runtime safety checks; and just-in-time compilation, which turns hot bytecode into native code for near-native speed.
你得到的是可移植性——一次编写，到处运行——加上运行时的安全检查，还有即时编译： 把常跑的字节码变成本机代码，速度接近原生。
The cost is an extra layer, and the VM must be installed first.
代价是多了一层，而且必须先装好虚拟机。
Circuits are built from logic, and Boolean algebra simplifies that logic — fewer terms means fewer gates.
电路由逻辑搭成，而布尔代数可以化简这些逻辑——项越少，门就越少。
Handy laws: anything AND one is itself; anything OR its own opposite is one; and De Morgan's laws let you swap AND with OR when you negate.
几条好用的定律： 任何东西"与"上一，还是它自己；任何东西"或"上它自己的反，结果是一； 而德摩根定律让你在取反时把"与"和"或"互换。
A Karnaugh map does the same job visually: write the ones from the truth table, grouping adjacent ones in blocks of two, four, or eight.
卡诺图用图形做同样的事： 把真值表里的一填进去，然后把它们按二、四、八个一组圈起来。
The larger the group, the simpler the term — any variable that changes inside a group simply disappears.
组越大，项就越简单—— 任何在组内发生变化的变量，就直接消失了。
Now the laws themselves.
现在来看这些定律本身。
An expression and a truth table describe the same circuit; algebra just lets you shrink it.
一个表达式和一张真值表描述的是同一个电路，代数只是让你把它变小。
Write plus for OR, a dot for AND, and a bar over a letter for NOT.
加号表示或，点表示与，字母上面一横表示非。
Commutative, associative and distributive behave as in ordinary algebra. Then the ones to memorise: identity, A OR zero is A, and A AND one is A. Null, A OR one is one, and A AND zero is zero.
交换律、结合律、分配律和普通代数里一样。
Idempotent, A OR A is A. Inverse, A OR NOT A is one. And absorption, A OR A AND B is just A, because whenever A is one the whole thing is one anyway.
然后是必须背下来的几条：同一律，A 或 0 等于 A，A 与 1 等于 A；零一律，A 或 1 等于 1， A 与 0 等于 0；重叠律，A 或 A 等于 A；互补律，A 或 A 的非等于 1； 还有吸收律，A 或 A 与 B，就等于 A，因为只要 A 为 1，整个式子本来就是 1。
Let us simplify one.
我们来化简一个。
Z equals A AND B, OR A AND NOT B.
Z 等于 A 与 B，或 A 与 B 的非。
Both terms contain A, so factor it out: Z equals A AND, bracket, B OR NOT B.
两项里都有 A，所以把它提出来： Z 等于 A 与括号里的 B 或 B 的非。
But B OR NOT B is always one, by the inverse law, and A AND one is A.
可是 B 或 B 的非永远等于 1，这就是互补律； 而 A 与 1 等于 A。
So Z equals A. Look at what that saved.
所以 Z 就等于 A。
The first expression needs two AND gates, a NOT and an OR: four gates in silicon. The answer needs no gate at all, just a wire.
看看这省下了什么： 原来的表达式需要两个与门、一个非门和一个或门，一共四个门；而答案一个门都不需要，只要一根线。
Fewer terms means fewer gates, and that is the whole point of simplifying.
项越少，门就越少——这就是化简的全部意义。
Two rules do most of the work on a Karnaugh map.
在卡诺图上，两条规则就能解决大部分问题。
First, the labels run in Gray code order, zero-zero, zero-one, one-one, one-zero, so that neighbouring cells differ in only one variable. That is what makes adjacent grouping legal.
第一，行列标号按格雷码排列：零零、零一、一一、一零， 这样相邻的格子之间只有一个变量不同——正是这一点让分组成立。
Second, make every group as large as possible: a group of two drops one variable, four drops two, eight drops three.
第二，每个组都要尽可能大： 两个一组消掉一个变量，四个消掉两个，八个消掉三个。
And the map wraps around its edges, so the leftmost column is next to the rightmost.
而且这张图的边缘是绕回去的， 最左边那一列和最右边那一列相邻。
That wrap is the grouping most candidates miss.
这个绕回，正是大多数考生漏掉的分组。
From gates we build arithmetic.
有了逻辑门，我们就能搭出算术。
A half adder takes two bits and produces a sum and a carry: the sum is an exclusive-OR of the inputs, and the carry is an AND.
半加器接收两个位，产生一个和与一个进位： 和是两个输入的异或，进位是它们的与。
It is called half because it ignores any carry coming in.
它之所以叫"半"，是因为它忽略了送进来的进位。
A full adder fixes that — it adds three bits, the two inputs plus a carry-in, and you can build one from two half adders and an OR gate.
全加器补上了这一点——它把三个位相加，也就是两个输入再加一个进位输入， 而你可以用两个半加器加一个或门把它搭出来。
Chain full adders together, each carry feeding the next, and you can add whole binary numbers.
把一串全加器接起来， 每一个的进位喂给下一个，你就能把整个二进制数加起来。
Take the half adder apart.
把半加器拆开看。
It adds two single bits, A and B, and gives two outputs, a sum and a carry.
它把两个单独的位 A 和 B 相加，给出两个输出：和与进位。
Zero and zero: sum zero, carry zero.
零和零：和是零，进位是零。
Zero and one: sum one, no carry.
零和一：和是一，没有进位。
One and zero: the same, sum one.
一和零：一样，和是一。
One and one is two, and two in binary is one-zero, so the sum digit is zero and the carry is one.
一加一等于二，而二的二进制是一零，所以和这一位是零，进位是一。
Now read the output columns: the sum is A XOR B, and the carry is A AND B.
现在读输出的两列：和就是 A 异或 B，进位就是 A 与 B。
It ignores any carry coming in, and that is why it is only half an adder: a carry arriving from the column before it has nowhere to go.
它忽略了送进来的进位，所以它只是半个加法器：从前一位传过来的进位，在这里无处可去。
A full adder repairs that.
全加器补上了这一点。
It adds three bits, A, B and a carry-in, and gives a sum and a carry-out.
它把三个位相加：A、B 和一个进位输入，给出一个和与一个进位输出。
The sum is A XOR B XOR the carry-in, and you can build the whole thing from two half adders and one OR gate: the first half adder adds A and B, the second adds the carry-in to that sum, and the OR gate combines the two carries.
和等于 A 异或 B 再异或进位输入，而整个电路可以用两个半加器加一个或门搭出来： 第一个半加器把 A 和 B 相加，第二个把进位输入加到这个和上，或门再把两个进位合起来。
Chain them, each carry-out feeding the next carry-in, and you can add whole binary numbers. That is a ripple-carry adder.
把它们串成一串，每一级的进位输出接到下一级的进位输入，你就能加整个二进制数了—— 这就是逐位进位加法器。
Adding is not remembering.
会加法不等于会记住。
A flip-flop is a bistable circuit that remembers its state: it has two stable states, zero and one, and it stays in whichever one you put it in, so it stores one bit.
触发器是一个双稳态电路：它有两个稳定状态，零和一， 你把它放到哪个状态它就停在那里，所以它能存一个位。
An SR flip-flop has inputs S for set and R for reset, and outputs Q and NOT Q. S one, R zero sets Q to one.
SR 触发器有两个输入： S 表示置位，R 表示复位；输出是 Q 和 Q 的非。
S zero, R one resets it to zero. Both zero holds the value it already had. Both one is invalid: it asks the circuit to set and reset at once.
S 为一、R 为零，把 Q 置成一； S 为零、R 为一，把它复位成零；两个都为零，就保持原来的值； 两个都为一是无效的，因为那要求电路同时置位又复位。
It is built from two cross-coupled NOR gates, each one holding the other's output steady.
它由两个交叉耦合的或非门搭成， 两个门互相把对方的输出稳住。
The JK flip-flop puts that wasted input to work: J and K both one becomes toggle, and the output simply flips.
JK 触发器把那个被浪费的输入用起来了：J 和 K 都为一时变成翻转，输出直接反过来。
Hold, reset, set, toggle: four useful cases instead of three and a mistake.
保持、复位、置位、翻转——四种有用的情况，而不是三种加一个错误。
Toggling is exactly what a counter needs, so a chain of JK flip-flops counts in binary.
翻转正是计数器需要的， 所以一串 JK 触发器就能按二进制计数。
And it is clocked: the inputs act only on a clock edge, which keeps every flip-flop in step.
而且它通常是时钟控制的：输入只在时钟边沿起作用， 这让每个触发器都保持同步。
Put n of them side by side and you have an n-bit register, and the same cell is what SRAM — static RAM — is made of.
把 n 个并排放在一起，你就有了一个 n 位寄存器； 同样的单元，也正是静态 RAM 的组成部分。
Three marks to lock in.
三个要拿稳的分。
First, compare RISC and CISC — simple fixed-length instructions versus complex variable ones — and say why RISC suits pipelining.
第一，比较 RISC 和 CISC——简单的定长指令对复杂的变长指令—— 并说清楚为什么 RISC 适合流水线。
Second, simplify with Boolean algebra or a Karnaugh map, grouping the ones in powers of two.
第二，用布尔代数或卡诺图化简，把那些一按二的幂次分组。
Third, know a half adder from a full adder — the full one takes a carry-in — and that a flip-flop stores one bit.
第三，分清半加器和全加器——全加器多了一个进位输入——并知道一个触发器存一个位。
Nail these, and this topic is yours.
掌握这些，这个专题就是你的了。
Three more marks, from the second half of this topic.
再来三个分，来自这个专题的后半部分。
Place a machine in Flynn's taxonomy by counting streams: one instruction on one item is SISD, one instruction on many items is SIMD, many on many is MIMD.
给一台机器归到弗林分类里，就数流的数量： 一条指令处理一个数据是 SISD，一条指令处理许多数据是 SIMD，许多指令处理许多数据是 MIMD。
Say a massively parallel machine is MIMD with distributed memory, passing messages.
大规模并行机要说成 MIMD，配分布式内存，靠消息传递。
And define a virtual machine as a software emulation of a computer: a hypervisor runs whole operating systems, a process VM runs one program in bytecode.
而虚拟机要定义成对一台计算机的软件仿真：虚拟机监控器跑整个操作系统， 进程虚拟机只跑一个用字节码写成的程序。