Adders and flip-flops
| English | Chinese | Pinyin |
|---|---|---|
| flip-flop | 触发器 | chù fā qì |
| half adder | 半加器 | bàn jiā qì |
| JK flip-flop | JK触发器 | JK chù fā qì |
| full adder | 全加器 | quán jiā qì |
| ripple-carry adder | 行波进位加法器 | xíng bō jìn wèi jiā fǎ qì |
| bistable | 双稳态 | shuāng wěn tài |
| SR flip-flop | SR触发器 | SR chù fā qì |
Circuits that add and remember
- Logic gates can do real work: adders do binary arithmetic, flip-flops 触发器 remember a bit.
- These are the building blocks of the ALU and of memory.
- (Recall the gate symbols from the logic-gates lesson.)
The half adder 半加器
- A half adder adds two single bits, giving a sum $S$ and a carry $C$:
| A | B | S | C |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
- So $S = A \text{ XOR } B$ and $C = A \text{ AND } B$. It ignores any carry-in — hence "half".
A JK flip-flop JK触发器: its symbol and a build from NAND gates
The gates inside an adder
A half-adder's sum bit is an XOR gate and its carry is an AND gate — toggle A and B and watch the truth-table row light up.
In a half adder, the sum output S is produced by which gate?
$S = A \text{ XOR } B$ (1 when the inputs differ); the carry is $A \text{ AND } B$.
The full adder 全加器
- A full adder adds three bits ($A$, $B$, and a carry-in), giving a sum and a carry-out.
- $S = A \text{ XOR } B \text{ XOR } C_{\text{in}}$. It can be built from two half adders plus an OR gate.
- Chaining full adders (each carry-out feeding the next carry-in) makes a multi-bit ripple-carry adder 行波进位加法器.
A half adder, as a block and as a circuit of an XOR and an AND gate
Match each building block to what it does.
Adders add bits (chain full adders for multi-bit addition); flip-flops store a bit (the JK fixes the SR forbidden state).
How does a full adder differ from a half adder?
A full adder adds A, B and a carry-in (so adders can be chained) — built from two half adders plus an OR gate.
Flip-flops
- A flip-flop is bistable 双稳态 (two stable states) — it remembers one bit. It's the basic element of registers and SRAM.
- An SR flip-flop SR触发器 (set/reset):
S=1,R=0sets Q to 1;S=0,R=1resets it;S=0,R=0holds;S=1,R=1is invalid. - A JK flip-flop uses the invalid
1,1input as a toggle (the output flips) — ideal for counters. It is usually clocked so flip-flops stay synchronised.
A full adder is built from two half adders and an OR gate
A flip-flop is used to:
A flip-flop has two stable states and holds one bit — the building block of registers and SRAM.
A flip-flop is bistable — it has two stable states and remembers one bit — which makes it the building block of registers and SRAM.
Chaining flip-flops gives registers and counters; SRAM cache is built from them (no refresh needed, unlike DRAM).
You've got it
- half adder: $S = A \text{ XOR } B$, $C = A \text{ AND } B$ (no carry-in)
- full adder: adds 3 bits (incl. carry-in) = two half adders + an OR; chain them for a ripple-carry adder
- a flip-flop is bistable and stores one bit (registers, SRAM)
- SR (set/reset, 1/1 invalid); JK uses 1/1 as a toggle — good for counters