Von Neumann architecture and the CPU
| English | Chinese | Pinyin |
|---|---|---|
| Von Neumann architecture | 冯·诺依曼体系结构 | féng · nuò yī màn tǐ xì jié gòu |
| stored program | 存储程序 | cún chǔ chéng xù |
| ALU | 算术逻辑单元 | suàn shù luó jí dān yuán |
| control unit | 控制单元 | kòng zhì dān yuán |
| registers | 寄存器 | jì cún qì |
| system clock | 系统时钟 | xì tǒng shí zhōng |
| accumulator | 累加器 | lěi jiā qì |
| address bus | 地址总线 | dì zhǐ zǒng xiàn |
| data bus | 数据总线 | shù jù zǒng xiàn |
How a processor is built
- Almost every computer follows the Von Neumann architecture 冯·诺依曼体系结构.
- Its big idea — the stored program 存储程序 — is why one machine can do so many jobs.
- Inside the CPU sit the ALU 算术逻辑单元, control unit 控制单元, clock and registers 寄存器, linked by buses.
Von Neumann architecture
- A single memory holds both program instructions and data (the stored-program idea).
- The processor fetches instructions from memory and runs them one at a time, in order, unless a branch changes the flow.
- Change the program and you change what the computer does — no rewiring needed.
The stored-program (Von Neumann) idea means that:
One memory holds instructions and data together; changing the stored program changes what the computer does, with no rewiring.
The CPU's main parts
- Arithmetic and Logic Unit (ALU) — does arithmetic (add, subtract) and logic (AND, OR, compare).
- Control Unit (CU) — decodes each instruction and sends the control signals to carry it out.
- System clock 系统时钟 — steady pulses keep the CPU in step; clock speed (e.g. 3.8 GHz) is one factor in performance.
- Registers — tiny, very fast stores inside the CPU.
A CPU socket on a motherboard: the chip's contacts press onto these pins
Tap the parts of a Von Neumann computer
Explore each block. The CPU (control unit, ALU, registers) talks to a single main memory over the buses — and that one shared memory for instructions AND data is the Von Neumann idea.
The ALU is responsible for:
The Arithmetic and Logic Unit performs calculations and logic/comparisons. Decoding is the control unit's job.
The special-purpose registers
| Register | Job |
|---|---|
| PC (program counter) | address of the next instruction |
| MAR (memory address register) | the address being read/written |
| MDR (memory data register) | the data going to/from memory |
| CIR (current instruction register) | the instruction being decoded |
| ACC (accumulator 累加器) | the value the ALU is working on |
| Status register | flags (carry, zero, negative, overflow) |
(General-purpose registers hold the programmer's temporary values.)
The three system buses connecting the CPU, memory and input/output
Match each special-purpose register to what it holds.
PC points to the next instruction, CIR holds the current one, MAR/MDR are the address/data pair for memory, ACC holds the running result.
Buses
- Address bus 地址总线 — carries the memory address. One-way (CPU → memory).
- Data bus 数据总线 — carries the data. Two-way.
- Control bus — carries control signals (read, write, interrupt). Two-way.
- An $n$-bit address bus can reach $2^n$ memory locations.
- Also know: the Immediate Access Store (IAS) holds program and data (the stored program concept); cache memory speeds access; the Index Register (IX) holds an offset; data moves are written in register transfer notation; ports include USB (Universal Serial Bus), HDMI (High Definition Multimedia Interface) and VGA (Video Graphics Array).
How many memory locations can a 16-bit address bus reach?
$2^{16} = 65\,536$ locations.
Which bus is one-way (carries information in only one direction)?
The address bus is one-way (CPU → memory). The data and control buses are two-way.
A wider address bus lets the CPU address more memory locations.
Each extra address line doubles the reach — n lines address 2ⁿ locations.
You've got it
- stored program: one memory holds instructions and data; the CPU runs them one at a time
- ALU (maths/logic), CU (decode + control signals), clock, registers
- key registers: PC (next instruction), MAR/MDR (memory), CIR (current), ACC (working value)
- address bus (one-way, $2^n$ locations), data & control buses (two-way)