Von Neumann architecture and the CPU
| English | Chinese | Pinyin |
|---|---|---|
| processor | 处理器 | chǔ lǐ qì |
| registers | 寄存器 | jì cún qì |
| buses | 总线 | zǒng xiàn |
| Von Neumann architecture | 冯·诺依曼体系结构 | féng · nuò yī màn tǐ xì jié gòu |
| Immediate Access Store | 立即存取存储器 | lì jí cún qǔ cún chǔ qì |
| stored program | 存储程序 | cún chǔ chéng xù |
| ALU | 算术逻辑单元 | suàn shù luó jí dān yuán |
| control unit | 控制单元 | kòng zhì dān yuán |
| system clock | 系统时钟 | xì tǒng shí zhōng |
| clock speed | 时钟频率 | shí zhōng pín lǜ |
| general-purpose registers | 通用寄存器 | tōng yòng jì cún qì |
| special purpose registers | 专用寄存器 | zhuān yòng jì cún qì |
| Program Counter | 程序计数器 | chéng xù jì shù qì |
| Memory Address Register | 内存地址寄存器 | nèi cún dì zhǐ jì cún qì |
| Memory Data Register | 内存数据寄存器 | nèi cún shù jù jì cún qì |
| Current Instruction Register | 当前指令寄存器 | dāng qián zhǐ lìng jì cún qì |
| accumulator | 累加器 | lěi jiā qì |
| Index Register | 变址寄存器 | biàn zhǐ jì cún qì |
| Status Register | 状态寄存器 | zhuàng tài jì cún qì |
| flag | 标志 | biāo zhì |
| address bus | 地址总线 | dì zhǐ zǒng xiàn |
| data bus | 数据总线 | shù jù zǒng xiàn |
| control bus | 控制总线 | kòng zhì zǒng xiàn |
| register transfer | 寄存器传送 | jì cún qì chuán sòng |
The report every computer still follows
- In June 1945 John von Neumann circulated a typed draft describing a machine that had not yet been built: the EDVAC.
- Its idea was simple and new. Keep the program in the same memory as the data, and have one processor fetch and carry out the instructions one at a time.
- The draft was never finished, but the design was copied everywhere. Your phone, your laptop and the school server are all built on it.
- This lesson takes the model apart: the memory, the processor's parts, its registers and the buses between them.
The Von Neumann model
- The Von Neumann architecture 冯·诺依曼体系结构 has a single memory, the Immediate Access Store 立即存取存储器 (IAS), holding both program instructions and data. That is the stored program 存储程序 concept.
- The processor 处理器 fetches each instruction from memory and executes it, one at a time, in address order unless a branch instruction changes the flow.
- Instructions, data and addresses all travel between processor and memory along shared buses 总线.
One memory, one processor, three buses
Why the stored program matters
- Change the program in memory and the same hardware does a different job. No rewiring, no new machine.
- A program is just data until it is fetched, so it can be loaded from a disk, sent over a network or written by another program.
- The exam wording: instructions and data are stored in the same memory, and instructions are fetched one at a time and executed by the processor.
The stored-program (Von Neumann) idea means that:
One memory holds instructions and data together; changing the stored program changes what the computer does, with no rewiring.
ALU, control unit and clock
- The ALU 算术逻辑单元 (Arithmetic and Logic Unit) does the arithmetic (add, subtract) and the logic (AND, OR, comparisons), taking operands from registers and putting the result back in one.
- The control unit 控制单元 (CU) decodes each instruction and sends the control signals that carry it out: opening data paths, telling the ALU what to do, ordering memory reads and writes.
- The system clock 系统时钟 sends a steady stream of pulses. The control unit moves the cycle on one step per pulse, so every part changes state together; the clock speed 时钟频率, in GHz, is the number of pulses a second.
The whole processor is one small chip
The ALU is responsible for:
The Arithmetic and Logic Unit performs calculations and logic/comparisons. Decoding is the control unit's job.
The ____ unit decodes each instruction and sends the control signals that carry it out.
The control unit decodes and signals; the ALU does the arithmetic and logic; the clock keeps them in step.
The registers
- Registers 寄存器 are tiny, very fast stores inside the processor. General-purpose registers 通用寄存器 hold the programmer's temporary values. Special purpose registers 专用寄存器 each have one fixed job in the cycle.
| Register | Job |
|---|---|
| Program Counter 程序计数器 (PC) | the address of the next instruction to be fetched |
| Memory Address Register 内存地址寄存器 (MAR) | the address of the location being read from or written to |
| Memory Data Register 内存数据寄存器 (MDR) | the data or instruction just read from, or about to be written to, that location |
| Current Instruction Register 当前指令寄存器 (CIR) | the instruction currently being decoded and executed |
| Accumulator 累加器 (ACC) | the result of the last arithmetic or logic operation |
| Index Register 变址寄存器 (IX) | an offset added to an address in indexed addressing |
| Status Register 状态寄存器 | the flags set by the last operation |
Registers, control unit and ALU, linked by the buses
Tap the parts of a Von Neumann computer
Explore each block. The CPU (control unit, ALU, registers) talks to a single main memory over the buses — and that one shared memory for instructions AND data is the Von Neumann idea.
Match each special-purpose register to what it holds.
PC points to the next instruction, CIR holds the current one, MAR/MDR are the address/data pair for memory, ACC holds the running result.
Worked example: "describe the role of each register"
- The table question wants one precise sentence per register, and the words that earn the marks are in bold.
- PC: holds the address of the next instruction to be fetched. MAR: holds the address of the location being accessed.
- MDR: holds the data just read from, or about to be written to, memory. CIR: holds the instruction currently being decoded and executed.
- ACC: holds the result of the last ALU operation. Notice that two registers hold addresses, two hold contents, and one holds a result.
The status register's flags
- Each flag 标志 is one bit, set or cleared by the ALU after an operation: the zero flag when a result or comparison gives zero, the carry flag when an addition overflowed the register, the negative flag when a result is negative, the overflow flag when a signed result does not fit.
- A conditional jump reads a flag to decide whether to branch. That is how
IFand loops reach the hardware. - An overflow flag can also raise an interrupt, which the next lesson handles.
Which of these are flags in the status register? Select all that apply.
Carry, zero, negative and overflow are one-bit flags set by the ALU. The program counter is a separate register holding an address.
The three buses
- The address bus 地址总线 carries the address the processor wants. It is one-way, processor to memory.
- The data bus 数据总线 carries the data or instruction itself. It is two-way, because reads and writes go in opposite directions.
- The control bus 控制总线 carries control signals such as read, write, clock and interrupt. It is two-way.
The three system buses connecting processor, memory and input/output
Which bus is one-way (carries information in only one direction)?
The address bus is one-way (CPU → memory). The data and control buses are two-way.
Worked example: how wide is wide enough?
- An $n$-bit address bus can address $2^{n}$ locations. A 16-bit bus reaches $2^{16} = 65\,536$ locations; a 32-bit bus reaches $2^{32}$, about four billion.
- "State one effect of increasing the width of the address bus": more memory locations can be addressed.
- "State one effect of increasing the width of the data bus": more bits move in each transfer, so fewer transfers are needed for the same data.
- Widen the address bus and you can have more memory; widen the data bus and you move it faster.
How many memory locations can a 16-bit address bus reach?
$2^{16} = 65\,536$ locations.
A wider address bus lets the CPU address more memory locations.
Each extra address line doubles the reach — n lines address 2ⁿ locations.
Register transfer notation
- Movements between registers and memory are written in register transfer 寄存器传送 notation:
MAR ← [PC]means "copy the contents of the PC into the MAR". - Square brackets mean "the contents of", and
[[MAR]]means "the contents of the location whose address is in the MAR". - The whole fetch-execute cycle is written this way in the next lesson; the notation is the same as the pseudocode assignment arrow.
What does MAR ← [PC] mean?
The arrow points at the destination and the square brackets mean "the contents of". This is the first step of every fetch.
Marks that slip away
- The PC holds the address of the next instruction, not the current one; the CIR holds the instruction, not an address.
- The MAR holds an address, the MDR holds data. Mixing them costs both marks.
- Only the address bus is one-way. Saying "all buses are one-way" or "the data bus is one-way" is a common slip.
- Registers are inside the processor, not part of RAM, and they are faster than any memory.
The program counter holds the instruction that is currently being executed.
The PC holds the address of the next instruction. The current instruction sits in the CIR.
You've got it
- Von Neumann: one memory (IAS) holds instructions and data; the processor fetches and executes them one at a time
- ALU computes, CU decodes and signals, the clock keeps the steps in time
- PC next address · MAR address being accessed · MDR data · CIR current instruction · ACC result · IX offset · status register flags
- address bus one-way, $2^{n}$ locations; data and control buses two-way;
MAR ← [PC]copies the contents of PC into MAR