Performance, the fetch-execute cycle and interrupts
| English | Chinese | Pinyin |
|---|---|---|
| port | 端口 | duān kǒu |
| interrupt | 中断 | zhōng duàn |
| clock speed | 时钟频率 | shí zhōng pín lǜ |
| cores | 核心 | hé xīn |
| word size | 字长 | zì zhǎng |
| cache | 高速缓存 | gāo sù huǎn cún |
| fetch-execute cycle | 取指-执行周期 | qǔ zhǐ - zhí xíng zhōu qī |
| interrupt service routine | 中断服务程序 | zhōng duàn fú wù chéng xù |
Speed, ports 端口 and the cycle
- What makes one CPU faster than another?
- How does it actually run an instruction?
- And how does it drop everything for an urgent event — an interrupt 中断?
What affects performance
- Clock speed 时钟频率 — more cycles per second.
- Number of cores 核心 — a multi-core CPU runs several threads at once (great for parallel work).
- Word size 字长 — a 64-bit CPU handles 64-bit chunks and addresses far more memory than 32-bit.
- Amount of RAM, cache 高速缓存 size, secondary storage type (SSD vs HDD), and bus width/speed all matter too.
- Match the spec to the workload: more cores for parallel jobs, higher per-core speed for single-threaded ones.
The fetch-execute cycle 取指-执行周期, with a check for interrupts each time
Select all the factors that affect CPU performance.
Clock speed, cores and cache (plus word size, RAM, storage and bus width) all affect performance. The case colour does not.
A multi-core CPU is especially helpful for:
Extra cores run tasks in parallel. A purely single-threaded job benefits more from higher per-core speed.
Ports
- A port is a physical socket for a peripheral:
- USB — general-purpose (keyboards, drives, phones); HDMI — digital video + audio to a screen.
- Ethernet (RJ-45) — wired LAN; audio jacks — headphones/microphone.
- USB-C is unusual in carrying video, data and power.
How an interrupt fits into the fetch-execute cycle
The fetch-execute cycle
- The CPU repeats this once per instruction:
- Fetch — copy PC → MAR; increment the PC; send a read signal; memory puts the instruction on the data bus → MDR → CIR.
- Decode — the CU works out the operation and operands.
- Execute — the CU carries it out (ALU for maths, load/store for memory, branch changes the PC). Then repeat.
The fetch-execute cycle
Tap round the loop the CPU repeats billions of times a second. Watch how fetch uses the PC/MAR/MDR/CIR registers, then decode and execute act on what was fetched.
Put the fetch steps in the correct order.
PC → MAR, increment PC, read signal, then the instruction travels MDR → CIR ready to decode.
The PC is incremented during the fetch stage so the next cycle fetches the following instruction.
Incrementing the PC early means it already points at the next instruction by the time this one executes (unless a jump changes it).
Interrupts
- An interrupt is a signal that pauses the cycle so the CPU can handle an urgent event (a key press, a packet, a fault, the OS timer).
- Handling one: finish the current instruction → save the state (PC + registers) → run the interrupt service routine 中断服务程序 (ISR) → restore the state → carry on.
- Interrupts let the system respond promptly and are how the OS multitasks.
An interrupt is:
An interrupt temporarily pauses the fetch-execute cycle so the CPU can service an urgent event, then resumes.
When an interrupt occurs, the CPU first finishes the current instruction, then:
It saves the PC and registers, runs the interrupt service routine, then restores the state and continues where it left off.
You've got it
- performance depends on clock speed, cores, word size, RAM, cache, storage, bus width
- a port is a socket for a peripheral (USB, HDMI, Ethernet)
- fetch (PC→MAR, increment PC, read → MDR → CIR) → decode → execute, repeat
- an interrupt pauses the cycle: save state → run ISR → restore state