| English | 의미 |
|---|---|
| processor/ˈprəʊsesə/ | 프로세서 |
| registers/ˈredʒɪstəz/ | 레지스터 |
| buses/ˈbʌsɪz/ | 버스 |
| Von Neumann architecture/vɒn ˈnɔɪmən ˈɑːkɪtektʃə/ | 폰 노이만 구조 |
| Immediate Access Store/ɪˈmiːdɪət ˈækses stɔː/ | 즉시 접근 저장소 |
| stored program/stɔːd ˈprəʊɡræm/ | 저장된 프로그램 |
| ALU/ˌeɪ el ˈjuː/ | 산술 논리 유닛(ALU) |
| control unit/kənˈtrəʊl ˈjuːnɪt/ | 제어 유닛 |
| system clock/ˈsɪstəm klɒk/ | 시스템 클럭 |
| clock speed/klɒk spiːd/ | 클럭 속도 |
| general-purpose registers/ˈdʒenərəl ˈpɜːpəs ˈredʒɪstəz/ | 일반 레지스터 |
| special purpose registers/ˈspeʃl ˈpɜːpəs ˈredʒɪstəz/ | 전용 레지스터 |
| Program Counter/ˈprəʊɡræm ˈkaʊntə/ | 프로그램 카운터 |
| Memory Address Register/ˈmeməri əˈdres ˈredʒɪstə/ | 메모리 주소 레지스터 |
| Memory Data Register/ˈmeməri ˈdeɪtə ˈredʒɪstə/ | 메모리 데이터 레지스터 |
| Current Instruction Register/ˈkʌrənt ɪnˈstrʌkʃn ˈredʒɪstə/ | 현재 명령어 레지스터 |
| accumulator/əˈkjuːmjʊleɪtə/ | 누산기 |
| Index Register/ˈɪndeks ˈredʒɪstə/ | 인덱스 레지스터 |
| Status Register/ˈsteɪtəs ˈredʒɪstə/ | 상태 레지스터 |
| flag/flæɡ/ | 플래그 |
| address bus/əˈdres bʌs/ | 주소 버스 |
| data bus/ˈdeɪtə bʌs/ | 데이터 버스 |
| control bus/kənˈtrəʊl bʌs/ | 제어 버스 |
| register transfer/ˈredʒɪstə ˈtrænsfɜː/ | 레지스터 전송 |
The report every computer still follows
- In June 1945 John von Neumann circulated a typed draft describing a machine that had not yet been built: the EDVAC.
- Its idea was simple and new. Keep the program in the same memory as the data, and have one processor fetch and carry out the instructions one at a time.
- The draft was never finished, but the design was copied everywhere. Your phone, your laptop and the school server are all built on it.
- This lesson takes the model apart: the memory, the processor's parts, its registers and the buses between them.
The Von Neumann model
- The Von Neumann architecture 冯·诺依曼体系结构 has a single memory, the Immediate Access Store 立即存取存储器 (IAS), holding both program instructions and data. That is the stored program 存储程序 concept.
- The processor 处理器 fetches each instruction from memory and executes it, one at a time, in address order unless a branch instruction changes the flow.
- Instructions, data and addresses all travel between processor and memory along shared buses 总线.

One memory, one processor, three buses
Why the stored program matters
- Change the program in memory and the same hardware does a different job. No rewiring, no new machine.
- A program is just data until it is fetched, so it can be loaded from a disk, sent over a network or written by another program.
- The exam wording: instructions and data are stored in the same memory, and instructions are fetched one at a time and executed by the processor.
저장된 프로그램(폰 노이만) 개념은 다음과 같습니다:
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명령어와 데이터를 하나의 메모리에 함께 보관하므로, 저장된 프로그램을 변경하면 회로를 재배선하지 않고도 컴퓨터의 동작을 바꿀 수 있습니다.
ALU, control unit and clock
- The ALU 算术逻辑单元 (Arithmetic and Logic Unit) does the arithmetic (add, subtract) and the logic (AND, OR, comparisons), taking operands from registers and putting the result back in one.
- The control unit 控制单元 (CU) decodes each instruction and sends the control signals that carry it out: opening data paths, telling the ALU what to do, ordering memory reads and writes.
- The system clock 系统时钟 sends a steady stream of pulses. The control unit moves the cycle on one step per pulse, so every part changes state together; the clock speed 时钟频率, in GHz, is the number of pulses a second.

The whole processor is one small chip
ALU의 역할은:
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산술 논리 장치는 계산과 논리/비교를 수행합니다. 디코딩은 제어 장치의 업무입니다.
____ 유닛이 각 명령어를 디코딩하여 이를 실행하는 제어 신호를 보냅니다.
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제어 장치가 디코딩하고 신호를 보내며, ALU가 산술 및 논리 연산을 수행하고, 클록이 이를 동기화합니다.
The registers
- Registers 寄存器 are tiny, very fast stores inside the processor. General-purpose registers 通用寄存器 hold the programmer's temporary values. Special purpose registers 专用寄存器 each have one fixed job in the cycle.
| Register | Job |
|---|---|
| Program Counter 程序计数器 (PC) | the address of the next instruction to be fetched |
| Memory Address Register 内存地址寄存器 (MAR) | the address of the location being read from or written to |
| Memory Data Register 内存数据寄存器 (MDR) | the data or instruction just read from, or about to be written to, that location |
| Current Instruction Register 当前指令寄存器 (CIR) | the instruction currently being decoded and executed |
| Accumulator 累加器 (ACC) | the result of the last arithmetic or logic operation |
| Index Register 变址寄存器 (IX) | an offset added to an address in indexed addressing |
| Status Register 状态寄存器 | the flags set by the last operation |

Registers, control unit and ALU, linked by the buses
폰 노이만 컴퓨터의 구성 요소 클릭하기
각 블록을 탐색하십시오. CPU(제어 장치, ALU, 레지스터)는 버스를 통해 단일 메인 메모리와 통신하며, 명령어와 데이터를 공유하는 이 하나의 메모리가 바로 폰 노이만의 핵심 개념입니다.
전용 레지스터와 각각이 저장하는 값을 매칭하십시오.
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PC는 다음 명령어를 가리키고, CIR는 현재 명령어를 저장하며, MAR/MDR은 메모리의 주소/데이터 쌍이고, ACC는 현재 연산 결과를 저장합니다.
Worked example: "describe the role of each register"
- The table question wants one precise sentence per register, and the words that earn the marks are in bold.
- PC: holds the address of the next instruction to be fetched. MAR: holds the address of the location being accessed.
- MDR: holds the data just read from, or about to be written to, memory. CIR: holds the instruction currently being decoded and executed.
- ACC: holds the result of the last ALU operation. Notice that two registers hold addresses, two hold contents, and one holds a result.
The status register's flags
- Each flag 标志 is one bit, set or cleared by the ALU after an operation: the zero flag when a result or comparison gives zero, the carry flag when an addition overflowed the register, the negative flag when a result is negative, the overflow flag when a signed result does not fit.
- A conditional jump reads a flag to decide whether to branch. That is how
IFand loops reach the hardware. - An overflow flag can also raise an interrupt, which the next lesson handles.
상태 레지스터에 포함되는 플래그(Branch flags)는 무엇입니까? 모두 선택하십시오.
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카리, 제로,负, 오버플로우는 ALU에 의해 설정되는 1비트 플래그입니다. 프로그래머 카운터는 주소를 저장하는 별도의 레지스터입니다.
The three buses
- The address bus 地址总线 carries the address the processor wants. It is one-way, processor to memory.
- The data bus 数据总线 carries the data or instruction itself. It is two-way, because reads and writes go in opposite directions.
- The control bus 控制总线 carries control signals such as read, write, clock and interrupt. It is two-way.

The three system buses connecting processor, memory and input/output
어떤 버스가 단방향(정보를 한 방향으로만 전송)입니까?
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주소 버스는 단방향입니다(CPU → 메모리). 데이터 버스와 제어 버스는 양방향입니다.
Worked example: how wide is wide enough?
- An $n$-bit address bus can address $2^{n}$ locations. A 16-bit bus reaches $2^{16} = 65\,536$ locations; a 32-bit bus reaches $2^{32}$, about four billion.
- "State one effect of increasing the width of the address bus": more memory locations can be addressed.
- "State one effect of increasing the width of the data bus": more bits move in each transfer, so fewer transfers are needed for the same data.
- Widen the address bus and you can have more memory; widen the data bus and you move it faster.
16비트 주소 버스로 접근 가능한 메모리 위치는 몇 개입니까?
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$2^{16} = 65\,536$개 위치.
더 넓은 주소 버스는 CPU가 더 많은 메모리 위치를 주소 지정할 수 있게 합니다.
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주소 라인 하나마다 접근 범위가 두 배로 늘어나며, n개의 라인은 2ⁿ개의 위치를 주소 지정합니다.
Register transfer notation
- Movements between registers and memory are written in register transfer 寄存器传送 notation:
MAR ← [PC]means "copy the contents of the PC into the MAR". - Square brackets mean "the contents of", and
[[MAR]]means "the contents of the location whose address is in the MAR". - The whole fetch-execute cycle is written this way in the next lesson; the notation is the same as the pseudocode assignment arrow.
MAR ← [PC]의 의미는 무엇인가?
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화살표는 목적지를 가리키고 대괄호는 "내용물"을 의미합니다. 이는 모든 FETCH 단계의 첫 번째 과정입니다.
Marks that slip away
- The PC holds the address of the next instruction, not the current one; the CIR holds the instruction, not an address.
- The MAR holds an address, the MDR holds data. Mixing them costs both marks.
- Only the address bus is one-way. Saying "all buses are one-way" or "the data bus is one-way" is a common slip.
- Registers are inside the processor, not part of RAM, and they are faster than any memory.
프로그래머 카운터는 현재 실행 중인 명령어를 저장합니다.
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PC는 다음 명령어의 주소를 저장합니다. 현재 명령어는 CIR에 위치합니다.
You've got it
- Von Neumann: one memory (IAS) holds instructions and data; the processor fetches and executes them one at a time
- ALU computes, CU decodes and signals, the clock keeps the steps in time
- PC next address · MAR address being accessed · MDR data · CIR current instruction · ACC result · IX offset · status register flags
- address bus one-way, $2^{n}$ locations; data and control buses two-way;
MAR ← [PC]copies the contents of PC into MAR