ADC, DAC and sensors
Introduced| English | Meaning |
|---|---|
| resolution/ˌrezəˈluːʃn/ | The ability to distinguish fine detail or closely separated features. |
| LSB | Least significant bit: the rightmost bit, with the smallest place value. |
| ADC/ˌeɪ diː ˈsiː/ | Analogue-to-digital converter: a circuit that turns a voltage into a binary number. |
| DAC/ˌdiː eɪ ˈsiː/ | DAC |
Volts in, numbers out
- The world speaks in volts; the CPU speaks in numbers. The node's temperature reading is only as good as its converter and its wiring.
- Errors here are quiet: the code runs, the number looks fine, and it is wrong.
Resolution: one LSB
- An ADC 模数转换器 turns a voltage into a code. An N-bit converter on a reference $V_{\text{ref}}$ has a resolution 分辨率 of one LSB 最低有效位: $V_{\text{ref}}/2^{N}$.
- Each code owns a band one LSB wide, so the error is at most half an LSB. More bits means finer steps.
An 8-bit ADC uses a 3.3 V reference. What is one LSB, in mV? Give 1 decimal place.
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$3.3/2^{8} = 3.3/256 = 12.9$ mV. Each extra bit halves the step.
From voltage to code
- The code is $\left\lfloor \dfrac{V_{\text{in}}}{V_{\text{ref}}} \times 2^{N} \right\rfloor$, so half of $V_{\text{ref}}$ reads $2^{N-1}$.
- A DAC 数模转换器 works in reverse: writing 2048 to a 12-bit DAC on 3.3 V gives 1.650 V.
A 12-bit ADC with a 3.3 V reference reads 0.5 V. What code does it give?
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$0.5/3.3 \times 4096 = 620.6$, and the code is the whole number below: 620.
You write 1024 to a 12-bit DAC on a 3.3 V reference. What voltage comes out, in V? Give 3 decimal places.
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$1024/4096 \times 3.3 = 0.825$ V, a quarter of the reference.
Worked example: the 12-bit sensor
- At $V_{\text{ref}} = 3.3$ V, one LSB is $3.3/4096 = 0.806$ mV, and 1.65 V reads 2048.
- To resolve 0.1 °C at 10 mV per °C the node needs 1 mV steps. 12 bits (0.806 mV) pass; 10 bits (3.22 mV) fail.
A sensor gives 10 mV per °C and must resolve 0.1 °C on a 3.3 V reference. What is the smallest ADC that works?
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0.1 °C is 1 mV, so the step must be at most 1 mV. 11 bits gives 1.61 mV and fails; 12 bits is the first that passes.
The sampling capacitor
- Inside the ADC, a small capacitor (about 7 pF) charges through the source resistance before each conversion.
- Settling to half an LSB needs a sampling time of at least $R_{\text{source}}\,C \ln(2^{N+1})$.
Worked example: the source-impedance trap
- For a 50 kΩ source on 12 bits: $50\,000 \times 7\text{ pF} \times 9.01 \approx 3.2$ µs. That is where the datasheet's "50 kΩ maximum" comes from.
- With a 1 µs window, the same bound allows only 16 kΩ. Choose the longer window, or lower the divider resistors.
A 10 kΩ source drives a 12-bit ADC with a 7 pF sampling capacitor. What is the shortest sampling time, in µs? Use ln(2^13) = 9.01 and give 2 decimal places.
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$10\,000 \times 7 \times 10^{-12} \times 9.01 = 0.63$ µs. A 50 kΩ source needs five times as long.
Three common slips
- Bits without the reference. 0.806 mV is true only at 3.3 V.
- ADC as a voltmeter. Its sampling current loads a high-impedance sensor, as the RC bound shows.
- Averaging to buy bits. 16 samples of random noise gain about 2 bits, but no average removes a fixed offset.
Averaging N samples of random noise gains half a bit for each doubling of N. How many bits do 64 samples gain?
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64 is $2^{6}$, six doublings, so $6 \times 0.5 = 3$ bits. Averaging cannot remove a fixed offset.
A 12-bit ADC always measures to 0.806 mV, whatever its reference voltage.
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One LSB is $V_{\text{ref}}/4096$. 0.806 mV is true only at 3.3 V; at 2.5 V the step is 0.61 mV.
Recap
- One LSB $= V_{\text{ref}}/2^{N}$; the requirement picks N.
- Half an LSB of quantisation error cannot be avoided.
- Sampling time $\ge R C \ln(2^{N+1})$ trades source resistance against speed.