Memory and I/O
Introduced| English | Meaning |
|---|---|
| memory-mapped I/O | memory-mapped I/O |
| GPIO | General-purpose input/output pins on a microcontroller that software can read or drive. |
| polling | Having software check a device's status again and again to see whether it needs attention. |
Buttons, LEDs and sensors as memory
- A sensor node's button, LED and temperature sensor all sit outside the CPU. The CPU talks to every one of them by reading and writing addresses.
- Done well, the firmware is a clean table of names; done badly, a pile of magic numbers. This lesson shows the clean way.
Memory-mapped I/O
- With memory-mapped I/O 内存映射输入输出, each peripheral register appears at an address. Reading a data register receives a value; writing one sends it.
- Each peripheral has a base address, and its registers sit at named offsets from it.
With memory-mapped I/O, the CPU uses ordinary load and store instructions to talk to a peripheral.
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The peripheral's registers sit at addresses, so a read or write to that address reaches the hardware instead of RAM.
The GPIO port
- A GPIO 通用输入输出 port has a direction register (one bit per pin: input or output) and a data register (the pin's level).
- Set the direction once at start-up, then read or write the data register as often as needed.
A pin stays an input no matter what you write to its data register. The likely cause is
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The direction register decides which way the pin works; the data register only carries the level. Set the direction first.
Polling
- Polling 轮询 waits for a peripheral by reading its status bit in a loop until the "done" bit is set.
- It is simple, but every lap of the loop is CPU time spent asking. Waiting $T$ seconds costs $T \times f_{\text{clock}}$ cycles.
Worked example: the cost of asking
- At 84 MHz with a 4-cycle loop, the CPU runs 21 million laps a second. A 1 ms wait is 21 000 laps, or 84 000 cycles.
- That is 100% of the CPU for the whole millisecond, doing nothing useful. Interrupts, in the next lesson, remove that cost.
A 4-cycle polling loop at 84 MHz waits 1 ms. How many CPU cycles does it use?
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$84 \times 10^{6} \div 4 = 21 \times 10^{6}$ laps a second; 1 ms is 21 000 laps × 4 cycles = 84 000 cycles, all of that millisecond.
The same 4-cycle loop at 84 MHz waits 250 µs for a sensor. How many laps does it run?
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21 million laps a second × 250 µs = 5250 laps.
Worked example: the node's map
- GPIO at
0x4000_0000, UART at0x4001_0000, timer at0x4002_0000, ADC at0x4003_0000. Each driver uses its base plus named offsets. - A typo such as
0x4001_0004for the UART base shifts every register by four bytes. Reading back each peripheral's ID register after start-up catches it at once.
The UART's base is 0x4001_0000 and its status register sits at offset 0x04. A driver that wrongly uses 0x4001_0004 as the base reads "status" from
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Every register shifts by four bytes, so the status read lands at 0x4001_0008, a different register. An ID read-back at start-up catches it.
Three common slips
- Forgetting the direction register. The pin stays an input, and writes to it do nothing.
- Polling without a timeout. A dead sensor then hangs the whole product.
- Port bit for package pin. The datasheet's pin table, not a convenient header name, is the truth.
The one safeguard every polling loop must carry is
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A timeout bounds the wait, so a dead sensor returns an error instead of hanging the product. The watchdog is the outer safety net, not the loop guard.
Match each register to its job.
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A driver is mostly these registers at a base address plus named offsets.
Recap
- Peripherals are memory: a base address plus named offsets.
- GPIO: set the direction once, then read or write the data.
- Poll with a timeout, and prove the map with a read-back check.