Input/output
導入済み
語彙
| English | 意味 |
|---|---|
| programmed I/O | Input/output in which processor instructions transfer data and check device status. |
| interrupt-driven I/O | Input/output in which device interrupts notify the processor that handling is needed. |
| DMA | Direct memory access: hardware transfers data between memory and a device without processor instructions for each item. |
English
Three transfer styles
- Programmed I/O (polling) spins the core on a status register. Interrupt-driven I/O lets the device signal and runs a handler per event. DMA moves the whole block and interrupts once at the end.

{exercise:uni-cs0605-styles}
実践
DMA differs from interrupt-driven I/O because it —
難易度 1/5 · 100 コイン + 今日初回達成時の小ボーナス
A DMA engine owns the transfer; the CPU pays one setup plus one completion.
English
The polling cost
- A device flag updates every 2 µs; one poll costs 50 cycles at 250 ps = 12.5 ns. Worst-case latency needs continuous polling: $2\,\text{µs} / 12.5\,\text{ns} = 160$ polls per event — 8 000 cycles of CPU attention per word.
- Interrupts cut that to the handler: 200 cycles per word. DMA moves 1024 words for a 500-cycle setup plus a 200-cycle completion interrupt: 0.68 cycles per word.
{exercise:uni-cs0605-cost}
実践
With 2 µs events and 12.5 ns polls, worst-case polling needs — polls per event
難易度 1/5 · 100 コイン + 今日初回達成時の小ボーナス
2 µs / 12.5 ns = 160 polls, all but one wasted.
English
Choose by shape
- A keyboard (about 5 characters per second): interrupts — one event per keypress, 200 cycles, negligible. A 4 MiB disk block at 2 GB/s: DMA — interrupt-per-word would drown the core (204 800 cycles of overhead against DMA's 700, a factor of 292).
- A sensor sampled exactly every 2 µs: polling in a tight loop is honest — the sample rate is the polling rate. Rule: poll what must be sampled, interrupt what arrives, DMA what streams.
{exercise:uni-cs0605-choose}
実践
A 2 GB/s disk block transfer belongs to —
難易度 1/5 · 100 コイン + 今日初回達成時の小ボーナス
Streaming data is DMA: 0.68 CPU cycles per word against 200 by interrupt.